Senior 3DIC Physical Design Engineer
- Belgique
- CDI
- Temps-plein
Join an international R&D team working at the edge of semiconductor innovation: 2.5D/3DIC design, Chiplet integration, and advanced physical implementation flows.Your Role
As a 3DIC Physical Design Engineer, you'll develop and implement physical design strategies for complex multi-die systems. You'll help shape the next generation of high-performance, low-power chip architectures.You will:Design high-speed clock buses across dies to meet strict PPA (Power, Performance, Area) targetsContribute to floorplanning, interconnect, power delivery, and thermal design in 2.5D/3DIC systemsDefine and apply signoff methodologies for multi-die integrationSupport STCO/DTCO initiatives to co-optimize architecture and technologyCollaborate with experts across architecture, design, packaging, and fabricationWhat We're Looking ForTechnical Expertise:Proven experience in back-end physical implementation, with large-scale chip design and verification (RTL2GDS)Solid understanding of physical design flows, EDA tools (e.g. Cadence, Synopsys), and timing closure techniquesHands-on experience with high-speed bus planning, 3DIC or Chiplet designsFamiliarity with advanced semiconductor processes (e.g. FinFET, 7nm/5nm), including design rules and process constraintsKnowledge of reliability, power integrity, and thermal management in multi-die systemsExperience translating system/product requirements into chip architecture and floorplan strategiesQualifications:Master's degree or PhD in Electronics, Computer Engineering, Physics, Materials Science, or related field5-10 years of relevant industry experienceBe part of a team redefining how the most advanced chips are physically built.Contact
Philippe BILDÉ
Antal International Paris Londonwww.antal.com/recruitment/france-paris-bscApply NowDo you have hands-on experience with physical design implementation for 3DIC or Chiplet-based multi-die systems?