Job DescriptionOn behalf of our client, a leading player in semiconductor R&D, we are recruiting a 3D Integration - Design for Test (DFT) EngineerYour RoleDesign and optimize DFT (Design for Test) strategies for digital, memory, and analog IPs.Develop and validate test methods for 3DIC architectures and interconnects.Analyze faults, defect mechanisms, and failure behaviors across system layers.Contribute to system-level DFX (Design for Excellence) strategies and test implementation.What We're Looking For5-10 years' experience in semiconductor testing, DFT, or reliability engineering.Strong knowledge of MBIST, SCAN, ATPG, fault modeling, and failure analysis.Background in digital, memory, or analog ICs, ideally including 3DIC or IO interconnects.Master's degree or higher in Electronics, Microelectronics, Physics, or related fields.Why JoinShape the future of high-performance, stacked chip systems.Work in a cutting-edge R&D environment on breakthrough technologies.Join a collaborative, global team focused on innovation and excellence.Contact Philippe BILDÉ Antal International Paris Londonwww.antal.com/recruitment/france-paris-bscApply NowDo you have experience working with 3D integrated circuits and advanced DFT methodologies?
