
Analog Layout Engineer
- Louvain, Brabant Flamand
- CDI
- Temps-plein
Perform physical verifications like DRC, LVS, EM-IR and other applicable checks for the designed blocks.
Perform floorplan and top-level routing, keeping in mind the various power domains, and various challenges associated to mixed signal design.
Perform all CHIP level validations post Dummy fill and other sign-off checks necessary for the tape-out.
Provide all the deliverables in time to meet the Project deadlines.
Preparation of reports and completion of checklists at the end of the Projec Required qualifications :Strong experience in designing various Analog Blocks and for Top Level integration of these blocks and signoff checks.
Knowledge to design layouts in TSMC16-12NM is a must.
Sound knowledge of EDA Tools.
Should be aware of Layout Dependent Effects for deep submicron technology nodes.
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